Xifan Tang

Xifan Tang is the CTO at RapidFlex US Inc, where he leads the development on eFPGA IP and EDA tools. He codes and maintain the OpenFPGA project, which is an open-source EDA tool chain enabling automate customizable FPGA IP generation. Based on OpenFPGA, he has accomplished more than 8 eFPGA tapeouts within 5 years in collaboration with a small-sized teams, which was not possible previously with a team of 50+ experienced engineers and 12+ months. OpenFPGA has been adopted by commercial FPGA vendors with 15+ successfully tapeouts, including but not limited to

• the backbone of QuickLogic’s Australis eFPGA IP generator and its associated software tools Aurora
• the backbone of RapidFlex’s MX200 eFPGA IPs and its EDA tool ArkAngel
• the enable of efabless CLEAR FPGA and its official design tool
• the backbone of Rapidsilicon’s Vega eFPGA IPs and its software tool Raptor

Before RapidFlex, Xifan Tang was the Chief Engineer at RapidSilicon in 2021-2022. He was a Research Assistant Professor at the University of Utah in 2020-2021, before which he was a research fellow at the same place in 2018-2020. He received Ph.D. degree in Computer Science and Communication from EPFL, Lausanne, Switzerland in 2017.

He has authored and co-authored 50+ technical papers, and hold 3 US patents. He has received the Best Contribution Award at the Workshop on Open-Source EDA Technology (WOSET’20), Chinese Government Award for Outstanding Self-Financed Students Abroad in 2015, and the Best paper award nomination at Intl’ Conf. on Field Programmable Technology (ICFPT’14).